Synchronous acquisition system of ECG Signal is the front-end module of ECG device. The thesis introduces the design and implementation of ECG acquisition system based on micro-controller of C8051F120. It is a 12-lead ECG quasi-synchronous acquisition system. As a generic ECG acquisition collector, the system can be applied to a variety of cardiac devices. In addition, when a PC plays a role of ECG signal processing module, it can work with PC through the connection of USB interface. So it has a certain ability to work independently. The system has small size and uses low power consumption, handles the requirements of high performance, supports plenty peripheral equipments and provides handy extensibility.According to the actual development process, this thesis is separated into several parts to describe our ECG acquiring system.Firstly, the paper outlines the basic knowledge of ECG, including the mechanism and features of it. In the ECG terminology, leads unite is the laying position of electrode in the human body and the connection mode between the electrode and amplifier. The paper gives a conversion formula from our system lead to the international standard 12-lead system. The processing module realizes this transformation through the software and draws up the electrocardiogram according to the above.Secondly, the thesis introduces the hardware design goal and the selection of microcontroller. The paper describes in detail the design principle of two amplifier. The first-level amplifying circuit enlarges the signal about 10 times, then the output signal enters the second-level amplifying circuit after “directs current” processes to enlarge about 50 times. The weak heart electrical signal is enlarged to achieve about 500 times after two levels of amplifiers, which is advantageous for ADC to carry on the sampling.Next, the paper introduces software design.The system has not so many tasks, but the relevance between these tasks is very strong, therefore, the software design is based on the foreground/background task schedule whose task scheduling can be grabed.The interrupts triggered by control command of superior machine has the highest priority, so SCM can respond to orders immediately. By changing the initialization mode of ADCO to realize synchronized gathering of 8-channel data. The system opens a ring-like buffer in the XDATA area of SCM, the gathering data stores into the temporary buffer after processing waiting for transmission . Finally, the thesis introduces the design of real-time filter on SCM.The filter bases on the Hamming window, uses the cascade filter to simplify the operation complexity. According to the Naikuisite theorem, we firstly designs a filter based on the 200Hz sampling frequency, then makes a transformation to make this filter adapt the request of our system. Through comparative study and repeated experiments, this thesis gives the key technology and core algorithm of the real-time filter, and confirms its feasibility through the simulation process.

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